Abstract: In response to the problems of high real-time requirements and limited transmission rate in the acquisition of high-speed signals for radio communication and radar systems, this paper proposes a design scheme for a high-speed ADC signal acquisition circuit based on FPGA. This scheme uses a self-developed 14-bit high-speed ADC chip, and through the FPGA control circuit, it completes digital signal processing, parameter and FFT characteristic verification to meet the requirements of high-speed signal acquisition. The FPGA code is developed based on the Vivado 2018.3 platform, using Verilog language and Xilinx-Kintex-7 series XC7K325T chip; the upper computer platform is based on Visual Studio 2022 to adapt to the STM32 chip. The article details the circuit structure, working principle, and design process of software and hardware drivers. Experimental results show that this circuit design is simple, reliable, and has low distortion, and can be widely applied to large-scale radars and shipborne weapon equipment.