合并单元采样值同步误差补偿方法研究
Research on Synchronous Error Compensation Method for Combined Unit Sampling Values
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摘要: 合并单元(MU)作为智能变电站过程层的核心设备,其采样值同步精度直接决定继电保护、电能计量等二次设备的工作可靠性。针对合并单元采样值同步过程中通道延时不一致、动态残差难抑制问题,本文提出基准对齐与二阶拉格朗日插值联合补偿方法。通过FIFO消除静态延时实现通道对齐,进而构建二阶插值模型实时补偿动态残差,并在FPGA中流水线实现。实验表明,该方法稳态平均误差低至0.011%,暂态工况下最大瞬时误差仅为0.041%,优于0.05%的工程阈值,且动态恢复时间缩短至1.7ms,可有效提升复杂工况下的采样同步精度与响应速度,满足电网运行要求。Abstract: The combined unit (MU), as the core equipment of the process layer in an intelligent substation, its sampling value synchronization accuracy directly determines the working reliability of secondary equipment such as relay protection and electric energy metering. Aiming at the problems of inconsistent channel delays and difficulty in suppressing dynamic residuals during the synchronization of sampling values of merged units, this paper proposes a joint compensation method of reference alignment and second-order Lagrangian interpolation. Channel alignment is achieved by eliminating static delays through FIFO, and then a second-order interpolation model is constructed to compensate for dynamic residuals in real time, which is implemented in a pipeline in FPGA. Experiments show that the steady-state average error of this method is as low as 0.011%, and the maximum instantaneous error under transient conditions is only 0.041%, which is better than the engineering threshold of 0.05%. Moreover, the dynamic recovery time is shortened to 1.7ms, which can effectively improve the sampling synchronization accuracy and response speed under complex working conditions and meet the operation requirements of the power grid.
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